SAN FRANCISCO–(BUSINESS WIRE)–The Design Automation Conference (DAC) now accepting submissions for the 57and DAC Designer and IP Track. This is an opportunity for engineers and developers from around the world to help shape the future by sharing their technical knowledge at the premier event dedicated to the design and automation of electronic chip design for systems.
The Designer and IP tracks bring together designers, users, and experts from around the world to showcase their design experiences on effective design flows, methods, and tool usage. Each track provides a unique opportunity to network and learn from other industry experts.
The 57and DAC will be held at the Moscone West Center in San Francisco, CA from July 19-23, 2020. DAC will be co-locating with SemiCon West 2020which takes place at the Moscone Center, North and South Concourses, July 21-23, 2020.
“The Designer Track focuses on the flows and methodologies deployed for ASIC user design, verification, implementation and software integration,” said Renu Mehra, Designer and President of Track IP, from Synopsys. “This track covers core EDA front-end and back-end topics and also focuses on verticals including autonomous systems, machine learning, security, and cloud. The Designer Track is the only one of its kind , developed exclusively by DAC to provide EDA tool users, hardware designers, software engineers, and application engineers with the ability to share their knowledge and experiences with each other.
“IP Track at DAC has grown significantly over the past five years since its inception,” said IP Track Co-Chair Randy Fish of UltraSoC. “Key to the growth is that it not only brings together the entire ecosystem of electronic design and intellectual property under one roof for three days, but that the track is aimed specifically at practitioners. So, Whether you are an IC designer, IP core designer, IP ecosystem provider, embedded software developer, automotive electronics engineer, security expert, or engineering manager, the IP track is the place to meet and share your experiences.”
The submission process for both tracks is simple: submit a 100-word description of your presentation with six slides. Submissions may describe the application of tools to the design of a new electronic system or the integration of EDA tools into a design flow or methodology to produce such systems. The Designer track and the IP track differ from vendor-specific user forums in that they are not tied to a specific EDA vendor.
Designer Runway Submissions: https://www.dac.com/submission-categories/designer-track
The DAC Designer Track committee seeks submissions that address relevant topics and provide high-quality content that targets challenges, innovations, and trends in chip design. Categories include:
Silicon front design
Back-end silicon design
IP Track Submissions: https://www.dac.com/submission-categories/ip-track
IP Track Submissions can describe the overall design and/or application of tools to create the hardware, IP and/or software components of a new electronic system. The IP Track committee specifically solicits contributions from:
Embedded software developers
The use of documented tools can target electronic design and system design at all levels of abstraction and in all application domains.
Presentation and poster format
Based on the evaluation of the program committee, Designer Track and IP Track submissions may be accepted in presentation and poster form or in poster form only. A Best Presentation award, based on both the quality of the submission and the DAC presentation itself, will be selected from each of the Front-end and Back-end Designer Tracks and IP Track presentations.
Presentations and posters accepted from Designer Track and IP Track are not included in the DAC procedures. However, accepted Designer Track and IP Track submissions (posters and presentation slides) will be made available on the CAD website after the conference as part of the CAD archive.
The deadline for all designer and IP lead submissions is January 22, 2020. For more information on submissions and deadlines, please visit www.dac.com under Call for papers or https://www.dac.com/submission-categories/designer-track#questions.
The Design Automation Conference (DAC) is recognized as the premier event for electronic circuit and system design, as well as electronic design automation (EDA) and silicon solutions. A diverse global community representing over 1,000 organizations attend each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives, researchers and scholars from major universities. Nearly 60 technical sessions selected by a committee of electronics design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. One of DAC’s strengths is its exposure and following with approximately 175 leading and emerging EDA, silicon, intellectual property (IP) and design service providers. The conference is sponsored by the Association for Computing Machinery’s Special Interest Group on Automation Design (ACM SIGDA) and the Institute of Electrical and Electronics Engineer’s Council on Electronic Design Automation (IEEE CEDA) .
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